1. Field of the Invention
This invention relates to a plasma display panel, and more particularly to an erasing method and apparatus that is capable of minimizing spurious wall charges left after an erasing discharge.
2. Description of the Related Art
Generally, a plasma display panel (PDP) excites and radiates a phosphorus material using an ultraviolet ray generated upon discharge of an inactive mixture gas such as He+Xe, Ne+Xe or He+Ne+Xe, to thereby display a picture. Such a PDP is easy to be made into a thin-film and large-dimension type. Moreover, the PDP provides a very improved picture quality owing to a recent technical development.
Referring to FIG. 1, a discharge cell of a conventional three-electrode, AC surface-discharge PDP includes a scan electrode Y, a sustain electrode Z, and an address electrode X intersecting the scan electrode Y and the sustain electrode Z.
Each intersection among the scan electrode Y, the sustain electrode Z and the address electrode X is provided with a cell 1 for displaying any one of red, green and blue colors. The scan electrode Y and the sustain electrode Z is provided on an upper substrate (not shown). A dielectric layer and an MgO protective layer (not shown) are disposed on the upper substrate. The address electrode X is provided on a lower substrate (not shown) . On the upper substrate is provided a barrier rib for preventing optical and electrical interference between horizontally adjacent cells. On the lower substrate and the surface of the barrier rib is provided a phosphorus material excited by a vacuum ultraviolet ray UV to emit a visible light. An inactive mixture gas such as He+Xe, Ne+Xe or He+Ne+Xe is injected into a discharge space between the upper substrate and the lower substrate.
Such a three-electrode AC surface-discharge PDP makes a time-divisional driving of one frame, which is divided into various sub-fields having a different emission frequency, so as to realize gray levels of a picture. Each sub-field is again divided into an initialization period for initializing the entire field, an address period for selecting the scan line and selecting the cell from the selected scan line and a sustain period for expressing gray levels depending on the discharge frequency. For instance, when it is intended to display a picture of 256 gray levels, a frame interval equal to {fraction (1/60)} second (i.e. 16.67 msec) is divided into 8 sub-fields SF1 to SF8 as shown in FIG. 2. Each of the 8 sub-field SF1 to SF8 is divided into an initialization period, an address period and a sustain period. Herein, the initialization period and the address period of each sub-field are equal for each sub-field, whereas the sustain period and the number of sustain pulses assigned thereto are increased at a ratio of 2n (wherein n=0, 1, 2, 3, 4, 5, 6 and 7) at each sub-field.
FIG. 3 shows a driving waveform of the conventional PDP applied to the sub-fields.
Referring to FIG. 3, the PDP is divided into an initialization period for initializing the full field, an address period for selecting a cell, and a sustain period for sustaining a discharge of the selected cell for its driving.
In the initialization period, a ramp-up waveform is simultaneously applied all the scan electrodes Y in a set-up interval SU. A discharge is generated within the cells at the full field with the aid of the ramp-up waveform. By this set-up discharge, positive wall charges are accumulated onto the address electrode X and the sustain electrode Z while negative wall charges are accumulated onto the scan electrode Y. In a set-down interval SD, a ramp-down waveform falling from a positive voltage lower than a peak voltage of the ramp-up waveform is simultaneously applied to the scan electrodes Y after the ramp-up waveform was applied. The ramp-down waveform causes a weak erasing discharge within the cells to erase a portion of excessively formed wall charges. Wall charges enough to generate a stable address discharge are uniformly left within the cells with the aid of the set-down discharge.
In the address period, a negative scanning pulse scan is sequentially applied to the scan electrodes Y and, at the same time, a positive data pulse data is applied to the address electrodes X in synchronization with the scanning pulse scan. A voltage difference between the scanning pulse scan and the data pulse data is added to a wall voltage generated in the initialization period to thereby generate an address discharge within the cells supplied with the data pulse data. Wall charges enough to cause a discharge when a sustain voltage is applied are formed within the cells selected by the address discharge. Meanwhile, a positive direct current voltage Zdc is applied to the sustain electrodes Z during the set-down interval and the address period.
In the sustain period, a sustaining pulse sus is alternately applied to scan electrodes Y and the sustain electrodes Z. Then, a wall voltage within the cell selected by the address discharge is added to the sustain pulse sus to thereby generate a sustain discharge, that is, a display discharge between the scan electrode Y and the sustain electrode Z whenever the sustain pulse sus is applied. The sustain pulse sus has a pulse width of about 2 to 3 μs for the sake of a stable discharge and keeps a sustain voltage Vs of about 180 to 200 volts. A discharge is caused within about 0.3 to 1.0 μs after a time at which the sustain pulse sus was generated. Thereafter, wall charges enough to cause the next discharge are formed with the cell in a time interval when the sustain voltage Vs is sustained.
After termination of the sustain discharge, an erasing signal for erasing space charges and wall charges formed by the sustain discharge is applied to the scan electrode Y and the sustain electrode Z. A fine-width erasing pulse rect-ers taking a rectangular waveform as shown in FIG. 4 or an erasing waveform taking a ramp shape (hereinafter referred to as “ramp erasing waveform) as shown in FIG. 5A and FIG. 5B is mainly used as the erasing signal. The fine-width erasing pulse rect-ers or the ramp erasing pulse ramp-ers is applied to an electrode opposed to any electrode supplied with the last sustain pulse sus of the scan electrode Y and the sustain electrode Z alternately supplied with the sustain pulse. In other words, the fine-width erasing pulse rect-ers or the ramp erasing waveform ramp-ers is applied to the sustain electrode Z when the last sustain pulse sus is applied to the scan electrode Y; whereas they is applied to the scan electrode Y when the last sustain pulse sus is applied to the sustain electrode Z.
However, the fine-width erasing pulse rect-ers or the ramp erasing waveform ramp-ers applied currently raises a problem in that a discharge characteristic deviation is not considered, or additional wall charges are generated due to a voltage applied after the erasing discharge to be left within the cell.
More specifically, the fine-width erasing pulse rect-ers taking a rectangular waveform keeps a sustain voltage Vs during a pulse width interval within approximately 1 μs as shown in FIG. 4. However, the cells of the PDP have some difference in a discharge delay characteristic because physical and electrical deviations within the cells exist. For this reason, if the fine-width erasing pulse rect-ers taking a rectangular waveform is applied to the scan electrodes Y or the sustain electrodes Z of the entire cells, then an erasing discharge is generated at the cell having a short discharge delay; whereas an erasing discharge is not generated at the cell having a long discharge delay more than approximately 1 μs. At the cells having not generated the erasing discharge, wall charges generated by the sustain discharge are left as they are to make an affect to the next sub-field.
On the other hand, the ramp erasing pulse ramp-ers has a rising edge rising from 0V or a ground voltage GND until a sustain voltage Vs which is equal to a value of approximately 5 μs and has a time interval sustaining the sustain voltage Vs which is equal to a value of approximately 3 μs, as shown in FIG. 5A. A majority of cells causes an erasing discharge during a voltage-rising interval as shown in FIG. 5B. However, since the sustain voltage Vs is relatively high and the sustaining interval thereof is relatively long, space charges within the cell are changed into wall charges after the erasing discharge and accumulated onto a dielectric material within the cell. The wall charges generated after the erasing discharge make an affect to the next sub-field. Herein, FIG. 5A depicts a ramp erasing waveform ramp-ers when the erasing discharge does not occur, and FIG. 5B shows a voltage drop 51 of the ramp erasing pulse ramp-ers caused by a discharge current generated at a position where the erasing discharge occurs.